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| White Electronic Designs 128MB - 16Mx64 SDRAM UNBUFFERED FEATURES Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3 volt 0.3v Power Supply 168 pin DIMM JEDEC WED3DG6419V-D2 DESCRIPTION The WED3DG6419V is a 16Mx64 synchronous DRAM module which consists of sixteen 8Mx8 SDRAM components in TSOP II package and one 2K EEPROM in an 8 pin TSSOP package for Serial Presence Detect which are mounted on a 168 pin DIMM multilayer FR4 Substrate. * This product is subject to change without notice. PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 *CB0 *CB1 VSS NC NC VCC WE# DQM0 Pin 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Front DQM1 CS0# DNU VSS A0 A2 A4 A6 A8 A10/AP BA1 VCC VCC CLK0 VSS DNU CS2# DQM2 DQM3 DNU VCC NC NC *CB2 *CB3 VSS DQ16 DQ17 Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Front DQ18 DQ19 VCC DQ20 NC *VREF CKE1 VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS CLK2 NC NC **SDA **SCL VCC Pin 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 *CB4 *CB5 VSS NC NC VCC CAS# DQM4 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back DQM5 CS1# RAS# VSS A1 A3 A5 A7 A9 BA0 A11 VCC CLK1 *A12 VSS CKE0 CS3# DQM6 DQM7 *A13 VCC NC NC *CB6 *CB7 VSS DQ48 DQ49 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back DQ50 DQ51 VCC DQ52 NC *VREF DNU VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS CLK3 NC **SA0 **SA1 **SA2 VCC PIN NAMES A0 - A11 BA0-BA1 DQ0-63 CLK0-CLK3 CKE0,CKE1 CS0#-CS3# RAS# CAS# WE# DQM0-7 VCC VSS SDA SCL DNU NC WP Address input (Multiplexed) Select Bank Data Input/Output Clock input Clock Enable input Chip select Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply (3.3V) Ground Serial data I/O Serial clock Do not use No Connect Write Protect * These pins are not used in this module. ** These pins should be NC in the system which does not support SPD. Aug. 2002 Rev. 2 1 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com White Electronic Designs FUNCTIONAL BLOCK DIAGRAM WED3DG6419V-D2 CS1# CSO# DQM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CS3# CS2# DQM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM4 CS# U0 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U8 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U4 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U12 CS# U1 CS# U9 cs# U5 CS# U13 DQM6 CS# U2 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U10 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U6 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U14 CS# U3 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U11 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# U15 SCL A0 A1 A2 SDA WP SA0 SA1 SA2 A0 ~ A12, BA0 & BA1 RAS# CAS# WE# CKE0 10 DQn VCC SDRAM U0 ~ U15 SDRAM U0 ~ U15 SDRAM U0 ~ U15 SDRAM U0 ~ U15 SDRAM U0 ~ U7 CKE1 VCC 10K SDRAM U8 ~ U15 10 CLK0/1/2/3 U0/U1/U2/U3 U4/U5/U6/U7 U8/U9/U10/U11 U12/U13/U14/U15 Every DQpin of SDRAM 3.3pF To all SDRAMs Two 0.1uF Capacitors per each SDRAM VSS Aug. 2002 Rev. 2 2 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, VOUT VCC, VCCQ TSTG PD IOS WED3DG6419V-D2 Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 16 50 Units V V C W mA Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, 0C TA +70C Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VCC VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 -- -10 Typ 3.3 3.0 -- -- -- -- Max 3.6 VCCQ+0.3 0.8 -- 0.4 10 Unit V V V V V A 1 2 IOH= -2mA IOL= -2mA 3 Note Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is 3ns. 3. Any input 0V VIN VCC Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25C, f = 1MHz, VCC = 3.3V, VREF=1.4V 200mV Parameter Input Capacitance (A0-A12) Input Capacitance (RAS#,CAS#,WE#) Input Capacitance (CKE0) Input Capacitance (CLK0, CLK2) Input Capacitance (CS0#,CS2#) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data input/output capacitance (DQ0-DQ63) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 COUT Max 50 50 25 50 25 13 50 13 Unit pF pF pF pF pF pF pF pF Aug. 2002 Rev. 2 3 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com White Electronic Designs VCC = 3.3V, 0C TA 70C Parameters Symbol Conditions WED3DG6419V-D2 OPERATING CURRENT CHARACTERISTICS Versions 133 Operating Current (One bank active) Precharge Standby Current in Power Down Mode Precharge Standby Current in Non-Power Down Mode ICC1 Burst Length = 1 tRC tRC(min) IOL = 0mA CKE VIL(max), tCC = 10ns CKE & CK VIL(max), tCC = CKE VIH(min), CS VIH(min), tCC =10ns Input signals are charged one time during 20 CKE VIH(min), CK VIL(max), tCC= Input signals are stable CKE VIL(max), tCC = 10ns CKE & CK VIL(max), tCC = CKE VIH(min), CS VIH(min), tCC = 10ns Input signals are charged one time during 20ns CKE VIH(min), CK VIL(max), tCC = input signals are stable Io = mA Page burst 4 Banks activated tCCD = 2CK tRC tRC(min) CKE 0.2V 2160 1760 100 1760 Units mA Note 1 ICC2P ICC2PS ICC2N ICC2NS 15 15 240 100 50 50 480 mA mA mA mA mA Active standby current in powerdown mode Active standby in current non power-down mode ICC3P ICC3PS ICC3N mA ICC3NS Operating current (Burst mode) ICC4 400 2160 mA mA 1 Refresh current Self refresh current ICC5 ICC6 2160 15 2160 mA mA 2 Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VCC/VssQ) Aug. 2002 Rev. 2 4 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com White Electronic Designs ORDERING INFORMATION Part Number WED3DG6419V10D2 WED3DG6419V7D2 WED3DG6419V75D2 Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Part Number WED3DG6319V10D2 WED3DG6319V7D2 WED3DG6319V75D2 WED3DG6419V-D2 Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Note: Modules are available in industrial temperature - 40C to 85C. Note: Available with "WP" Write Protect on pin 81. PACKAGE DIMENSIONS 133.48 (5.255 MAX.) 3.18 (0.125) (2X) 3.99 (0.157) (2X) 30.48 (1.200) 17.78 MAX. (0.700) P1 3.81 (0.150) MAX. 11.43 (0.450) 8.89 (0.350) 36.83 (1.450) 6.35 (0.250) 42.16 (1.660) 115.57 (4.550) 54.61 (2.150) 6.35 (0.250) 3.99 (0.157 MIN.) 1.27 (0.050 0.004) ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES) Aug. 2002 Rev. 2 5 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com White Electronic Designs Document Title 128MB - 16Mx64 SDRAM UNBUFFERED WED3DG6419V-D2 Revision History Rev # Rev 0 Rev 1 Rev 2 History Created datasheet 1.1 Corrected mechanical drawing 2.1 Changed from Advanced to Final datasheet Release Date 4-9-02 5-21-02 8-19-02 Status Advanced Advanced Final Aug. 2002 Rev. 2 6 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com |
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